Interleaving deals bits round its consumers one at a time. Lane i gets positions i, i+n, i+2n — so what one consumer sees is scattered through the word, never a contiguous field.
RAID stripes, memory channels, SIMD lanes and LED driver chains all distribute a stream round a fixed set of receivers to spread the load evenly. That makes the natural unit of the layout the ROUND, not the block: after n bits every consumer has exactly one. It is why a fault in one lane shows up as every n-th bit being wrong rather than as a damaged run, and why a plain bit diagram — which draws the word in order — tells you almost nothing about what any single consumer received.
It describes bit-level interleaving. Plenty of real systems stripe by byte, block or packet instead, and the same word then splits completely differently. And when the lane count does not divide the width the last lanes come up one bit short, which is the asymmetry that usually causes the bug.
Estimate with the rule, then check it against the calculator that models it properly.
Open Bit Calculator →Interleaving deals bits round its consumers one at a time. Lane i gets positions i, i+n, i+2n — so what one consumer sees is scattered through the word, never a contiguous field. RAID stripes, memory channels, SIMD lanes and LED driver chains all distribute a stream round a fixed set of receivers to spread the load evenly.